1. Field of the Invention
This invention relates to a power conversion control apparatus for controlling a converter which converts AC power to DC power or DC power to AC power. More specifically, the power conversion control apparatus is constituted by a dual system.
2. Description of the Related Art
FIG. 1 shows a block diagram of a power conversion control apparatus for a DC power supply system.
Referring to FIG. 1, the DC sides of converters 1A and 1B are connected to DC power supply line 3 by means of respective DC reactors 2A and 2B. The AC sides of converters 1A and lB are connected to AC systems 6A and 6B respectively through transformers 4A and 4B and circuit breakers 5A and 5B.
The control sections of converters 1A and 1B comprise constant-voltage control circuits 11A and 11B, constant margin angle control circuits 12A and 12B and constant-current control circuits 13A and 13B. The constant margin angle control circuits 12A and 12B operate such that the margin angle of converters 1A and lB tracks a margin angle reference value which is output from margin angle selectors 18A and 18B. DC voltage selectors 14A and 14B set respective voltage reference values. Each DC voltage across supply line 3 is detected by DC voltage detectors 15A and 15B. The detected DC voltage is provided to voltage/voltage conversion circuits 16A and 16B. The voltage/voltage conversion circuits 16A and 16B convert the detected DC voltage to a voltage level appropriate for the power conversion control apparatus. First comparators 17A and 17B receive the converted voltage from the voltage/voltage conversion circuits 16A and 16B and the voltage reference value from the DC voltage selectors 14A and 14B and calculate the difference between the converted value and the voltage reference value. The difference is provided to the constant-voltage circuits 11A and 11B. The voltage difference signal is generated so that the DC voltage of DC power supply line 3 follows the voltage reference value.
Further, transmission control circuits 26A and 26B output current reference values to second comparators 23A and 23B respectively. The second comparators 23A and 23B receive detected DC current and a current reference value. The DC current is detected by current detectors 21A and 21B and the detected DC current is converted by current/voltage conversion circuits 22A and 22B to an appropriate level for use by the power conversion control apparatus. The second comparators 23A and 23B calculate a difference between the DC current from current/voltage conversion circuits 22A and 22B and the current reference value from the transmission control circuits 26A and 26B, and provide the calculated difference to the constant-current control circuits 13A and 13B. The current reference value is provided from a current reference output circuit 27 to the transmission control circuit 26A, and is transmitted to the transmission control circuit 26B through a transmission line 19.
When the converters 1A and lB perform an inverse power conversion operation (DC to AC), switches 24A and 24B are closed. Thus, when the converter 1A performs the inverse power conversion operation, the switch 24A is closed and when the converter lB performs the inverse power conversion operation, the switch 24B is closed. When the switches 24A and 24B are closed, current margins which are output from current margin selectors 25A and 25B are provided to the second comparators 23A and 23B respectively. This operation is called "a current margin operation."
Control advance angle priority circuits 28A and 28B receive the outputs of constant-voltage circuits 11A and 11B, constant margin angle control circuits 12A and 12B and constant-current control circuits 13A and 13B, and output the largest one of the three inputs (with the most advanced control angle). The output from the control advance angle priority circuits 28A and 28B is provided to phase control circuits 29A and 29B, respectively. The phase control circuits 29A and 29B convert the output from the control advance angle priority circuits 28A and 28B to pulse signals which determine firing timing of the converters 1A and lB. The pulse signals from the phase control circuits 29A and 29B are provided to the converters 1A and lB as gate pulse signals through pulse amplification circuits 30A and 30B.
Next, a power conversion control apparatus for controlling the converter 1A which is constructed as a dual system will be described.
FIG. 2 shows a block diagram of the power conversion control apparatus which is constructed as the dual system. Those elements of FIG. 2 which correspond to those in FIG. 1 have been given like reference numerals.
In FIG. 2, the power conversion control apparatus is comprised of two systems 101 and 102 and pulse amplification circuit 30A. The controlled variables are harmonized in a stage preceding phase control circuits 29C and 29D in order to avoid variation of the output of the respective systems. Typically, the harmonization for the controlled variables is done by providing the output value of the control advance angle priority circuit 28C of system 101 and the output value of control advance angle priority circuit 28D of system 102 to a selection circuit 50C, which selects the controlled variables to be output to the phase control circuit 29C. A selection circuit 50D performs the same operation for system 102. When one of the systems 101 or 102 of the power conversion control apparatus operates abnormally, the outputting of the controlled variables of the abnormal system is halted and the abnormal system is isolated. Further, the selection circuit 50C or 50D of the normal system operates so as to not select the controlled variables of the abnormal system.
However, when the constant-current control circuits 13C and 13D utilize an algorithm which includes integration, the following problems can occur.
When forward power conversion operation is performed by the two systems 101 and 102, the selection by the selection circuits 50C and 50D is done based on a phase lag priority. There can exist a discrepancy in the current detection such that the detection is performed for the system 102 at a somewhat lower level than for the system 101.
Accordingly, the current detection value IdA of system 101 is more than the current detection value IdB of system 102. Further, when the current reference value IdpA of system 101 is equal to the current reference value IdpB of system 102, the difference .DELTA.IdA between the current reference value IdpA and the current detection value IdA of system 101 is less than the difference .DELTA. IdB between the current reference value IdpB and the current detection value IdB of system 102. EQU .DELTA.IdA=IdpA-IdA EQU .DELTA.IdB=IdpB-IdB EQU .DELTA.IdA&lt;.DELTA.IdB
Moreover, the output EcA of difference amplifier (not shown) which utilizes the integration algorithm in the constant-current control circuit 13C is less than the output EcB of difference amplifier (not shown) utilizing the integration algorithm in the constant-current control circuit 13D. EQU EcA&lt;EcB
Since the selection by the selection circuits 50C and 50D is done by phase lag priority because of the forward power conversion operation, the value used for control is the output EcA of the difference amplifier (not shown) 5 utilized in the constant-current control circuit 13C.
When the current reference value IdpA is equal to the current detection value IdA, the difference .DELTA.IdA of system 101 becomes zero and the difference .DELTA.IdB of system 102 becomes more than zero.
Accordingly, in the system 102, since the controlled variables of its own system are not selected, the controlled variables are integrated to a phase-advanced value by the integration algorithm utilized in the constant-current control circuit 13D and each of the controlled variables will approximate the limit value. To state this in another way, the system 101 does not require correction since the reference value equals the measured value (IdpA =IDA). However, system 102 does require negative feedback since IdpB is not equal to IdB but utilizes control parameters from 101, thus leading the integration circuit to saturation.
Additionally, when a problem occurs in system 101 and the system 101 is isolated, the phase of system 101 is advanced to the phase for operating the controlled variables of system 102 immediately upon the isolation of the system 101. In this situation, when the controlled variables of system 102 are very advanced, this can lead to saturation upon changeover. The controlled variables of system 102 would approximate the limit level as described above.
Accordingly, the control of the DC system is disturbed. Furthermore the instantaneous change of operating condition of the converter may have an adverse effect on the system and/or equipment. This situation occurs in the same way even if the selection circuits 50C and 50D are operated by phase-advance priority. Some discrepancy in the detection systems of dual control systems is inevitable, and even this expected level of discrepancy can result in the integration system becoming saturated.